Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-08-21
2007-08-21
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S158000, C718S103000
Reexamination Certificate
active
10923633
ABSTRACT:
In general, in one aspect, a method for storing data, including receiving a request to store data in a storage pool, determining a quantized deadline for the request, placing the request in an Input/Output (I/O) queue using the quantized deadline, placing a copy of the request in a logical block address (LBA) data structure using a LBA corresponding to the copy of the request, issuing the request to the storage pool using the I/O queue, and issuing an adjacent request to the storage pool using the LBA data structure, wherein the adjacent request is determined using the LBA of the copy of the request.
REFERENCES:
patent: 5787482 (1998-07-01), Chen et al.
patent: 6078998 (2000-06-01), Kamel et al.
patent: 6721789 (2004-04-01), DeMoney
patent: 6871011 (2005-03-01), Rahman et al.
patent: 7100074 (2006-08-01), Watanabe et al.
patent: 2005/0044289 (2005-02-01), Hendel et al.
Binary Search Trees and File Organization, J.Nievergelt; Computing Surveys, vol. 6, No. 3, Sep. 1974; pp. 203-204.
Bonwick Jeffrey S.
Cameron George R.
Moore William H.
Osha & Liang LLP
Ruiz Aracelis
Sun Microsystems Inc.
LandOfFree
Method and apparatus for I/O scheduling does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for I/O scheduling, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for I/O scheduling will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3861771