Method and apparatus for high speed bus having adjustable,...

Details Method and apparatus for high speed bus having adjustable,... Method and apparatus for high speed bus having adjustable,...

2005-04-05

2005-04-05

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Input noise margin enhancement

C326S021000, C326S026000, C326S086000

Reexamination Certificate

active

06876224

ABSTRACT:
A method of enhancing noise margin on digital signal lines of a system includes steps of evaluating impedances and lengths of the digital signal lines. Resonances of each digital signal line are determined, and target waveforms for each digital signal line optimized for noise margin are determined. A configuration is generated for a programmable device driver to configure the device driver to generate the waveform optimized for noise margin. An alternative embodiment selects waveforms, and corresponding configurations, from a group of possible waveforms at boot time to ensure that data is transferred with optimum noise margins. Also claimed is apparatus embodying bus drivers capable of driving a bus with a waveform approximating blended trapezoidal and sinusoidal edge shapes, this waveform being optimum for noise margin in certain systems having multidrop busses.

REFERENCES:
patent: 6198307 (2001-03-01), Garlepp et al.
patent: 6272577 (2001-08-01), Leung et al.
patent: 6288563 (2001-09-01), Muljono et al.
patent: 6456124 (2002-09-01), Lee et al.
patent: 6510526 (2003-01-01), Schoenborn

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