Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing
Patent
1998-01-21
2000-02-01
Auve, Glenn A.
Electrical computers and digital data processing systems: input/
Interrupt processing
Programmable interrupt processing
710269, G06F 946
Patent
active
060214589
ABSTRACT:
Methods and apparatus are disclosed for determining whether the highest priority pending interrupt is an active level-triggered interrupt. One method includes: determining whether the vector corresponding to the highest priority pending interrupt matches the vector associated with a particular interrupt input; if it does, determining whether that particular interrupt input is programmed to be a level-triggered interrupt; if it is, determining whether the level-status of that particular interrupt input is active; and, if it is, sending a level-triggered active message for the highest priority pending interrupt, by maintaining the set status of a particular bit. One embodiment of the present invention includes an interrupt service register operable to indicate when an interrupt is being serviced, an interrupt request register operable to indicate when an interrupt is pending, and a comparator operable to compare the vector corresponding to the highest priority pending interrupt with the vector associated with the particular interrupt input. Included also is a control generator coupled to the comparator, and operable to selectively clear and/or set bits contained in the interrupt service register and in the interrupt request register. The present invention supports both edge-triggered and level-triggered interrupts, without the need for a trigger mode register or other similar overhead house-keeping controls and related storage logic, and without any hand-shake requirements.
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Goru Vijay Kumar
Jayakumar Muthurajan
Auve Glenn A.
Intel Corporation
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