Method and apparatus for handling data transfers

Details Method and apparatus for handling data transfers Method and apparatus for handling data transfers

2005-04-25

2008-10-14

Elmore, Stephen C (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S100000, C711S154000, C711S171000, C710S010000, C369S030010, C369S047100

Reexamination Certificate

active

07437503

ABSTRACT:
Embodiments of the present invention provide for implementation of data transfers in an efficient manner. The 48-bit LBA mechanism requires two sets of I/O writes to IDE registers on primary channel or secondary channel. The two sets of I/O writes to the primary or secondary channel registers are performed by setting a status register to a first or second state appropriately depending on the data. Embodiments of the present invention provide a single set of writes to I/O registers when the size of the data transfer is equal to or below a threshold value.

REFERENCES:
patent: 5854942 (1998-12-01), Penokie
patent: 5875459 (1999-02-01), Taoda
patent: 5909592 (1999-06-01), Shipman
patent: 6502212 (2002-12-01), Coyle et al.
patent: 6557058 (2003-04-01), Jackson
patent: 6718401 (2004-04-01), Nalawadi et al.
patent: 6789163 (2004-09-01), Fox et al.
patent: 6892274 (2005-05-01), Nalawadi et al.
patent: 2001/0001870 (2001-05-01), Ofek et al.
patent: 2003/0056059 (2003-03-01), Fox et al.
patent: H07-36634 (1995-02-01), None
Tanenbaum, “Structured Computer Organization, Third Edition,” Section 1.4 Hardware, Software, and Multilevel Machines, p. 11, Hardware and software are logically equivalent., 1990.
International Search Report (dated May 30, 2005), International Application No. PCT/US03/27600—International Filing Date Mar. 9, 2003 (7 pages).
T13 1410D—Information Technology—AT Attachment with Packet Interface—6 (ATA/ATAPI-6), Revision 3b, Feb. 26, 2002, XP-002327985, Peter T. McLean, T13 Technical Editor, Technical Committee of Accredited Standards Committee NCITS (submitted in 6 packets—pp. i-76, pp. 77-166, pp. 167-256, pp. 257-346, pp. 347-436, and pp. 437-482).
Peter McLean, “48-Bit LBA Proposal”, Jan. 11, 2000, XP002327671, T13 Technical Committee, Retrieved from the Internet: URL:http://www.t13.org/technical/e0010r0 (pp. 1-8).
Jens Axboe, “Re: [PATCH] Take 48-Bit LBA a Bit Further”, Apr. 6, 2003, XP002327672, Linux-Kernel Archive, Retrieved from the Internet: URL:http://www.ussg.iu.edu/hypermail/linux//kernel/0304.0/1246.html (p. 1 of 1).
Jens Axboe, “[PATCH] Take 48-Bit LBA a Bit Further”, Apr. 6, 2003, XP-002327673, Linux-Kernel Archive, Retrieved from the Internet: URL:http//www.ussg.iu/.edu/hypermail/linux/kernel/0304.0/1239.html (pp. 1 or 3 through 3 of 3).
Chinese Office Action for the Application No. 03824959.6 dated Aug. 10, 2007, 8 pgs.

Affiliated with

Also associated with

Rating

Method and apparatus for handling data transfers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for handling data transfers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for handling data transfers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3997411