Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-08-02
2005-08-02
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06925625
ABSTRACT:
One embodiment of the present invention provides a system that facilitates placing flip-flops in an integrated circuit based on timing requirements. The system operates by first receiving a netlist for flip-flop connectivity. Next, the system determines a metal layer class definition for each signal in the netlist based upon timing requirements of a corresponding flip-flop. The system then classifies a flip-flop instance using the metal layer class definition by defining a flip-flop type for each flip-flop instance and associating the flip-flop with a group of other flip-flops that have a same metal layer class definition. Finally, determining a position for the group by replacing an existing repeater in the integrated circuit with the group of flip-flops.
REFERENCES:
patent: 5896300 (1999-04-01), Raghavan et al.
patent: 5999716 (1999-12-01), Toyonaga
patent: 6286126 (2001-09-01), Raghavan et al.
patent: 6536024 (2003-03-01), Hathaway
patent: 6782520 (2004-08-01), Igusa et al.
Grundler Edward S.
Park Vaughan & Fleming LLP
Siek Vuthe
Sun Microsystems Inc.
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