Method and apparatus for graphically programming a...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C345S215000, C345S215000, 74, 74

Reexamination Certificate

active

06671869

ABSTRACT:

FIELD OF THE INVENTION
This invention relates in general to communication networks, and more particularly to a graphical programming tool and method for generating optimized code and configuration settings for a target device, such as a programmable circuit or chip.
BACKGROUND OF THE INVENTION
In the design of electronic circuits, at least some, if not all of a circuit's functionality is often provided in the form of programmable circuits. At the high end of the programmability range are general purpose processors, which can be programmed to perform a wide range of functions in accordance with a predefined instruction set. However it is often the case that more specialized applications are required for a particular design, where a general purpose processor is ill-equipped with the requisite hardware architecture to perform the specific functions desired.
To target such situations, designers often use Application-Specific Integrated Circuits (ASIC). As its name implies, an ASIC is a custom chip designed for a specific application. ASICs may be designed such that they can be configured to some extent at run-time deployment of the chip. ASICs are generally considered for a very specific use, and are often not intended as a commodity item that can be used by multiple customers for multiple uses.
Other programmable circuits may include some of the programmability characteristics of general purpose processors, yet also include specific hardware directed to a more particular use. These special purpose circuits and/or chips require some level of programming to cause the device to operate in the desired fashion. For example, an Application-Specific Standard Processor (ASSP) is an example of a programmable circuit, but has a specific hardware architecture to accommodate a particular design purpose. These and other types of special-purpose programmable devices are generally designed for use in a particular piece of equipment, but are intended for sale and use by multiple vendors.
One disadvantage of such a special-purpose, programmable device is that developers who want to use the device in a system design have conventionally been forced to become intimately familiar with the hardware architecture and programming language associated with the device. For example, if a developer wanted to program a programmable network processor, the developer would study the architecture and data sheets associated with the particular device. The developer would need to do this in order to become knowledgeable enough to know how to program the device. Further, the programmable device may require programming via a special or proprietary programming language, thereby requiring the developer to learn a new programming language. From all of this new knowledge, the developer formulates the programming code that will be used by the device in performing the operations desired of that device for its particular application. When that process is complete, the developer performs simulations and other testing in order to properly debug the code that has been prepared. Often times many iterations of this process are required to obtain the performance objectives.
Although this painstaking approach can ultimately result in a device that is adequately programmed to carry out the desired functions, it takes a great deal of time for developers to learn the intricate architectural details of the device, program the device, and test the device. Where the device is to be used in a marketable design or system, this significantly, and adversely impacts the speed at which the design or system can reach the market. Furthermore, it is highly unlikely that the programming code will be generated in such a way as to optimize performance of the programmable device.
Accordingly, there is a need to facilitate the programming of such programmable circuits, in order to alleviate the burden and time commitment facing developers. The present invention provides a solution to the aforementioned and other shortcomings of the prior art, and provides a variety of significant advantages over prior art programming methodologies.
SUMMARY OF THE INVENTION
To overcome limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a graphical programming tool and method for generating optimized code and configuration settings for a target device, such as a programmable circuit or chip. One aspect of the invention provides for real-time performance and validity feedback in order to optimize the programming code and/or configuration settings. The invention allows the low level functionality of the target device to be abstracted into high-level application definitions, where the developer uses a Graphical Programming Interface (GPI) to control the operations of the target device, including data input, processing, data output, and dependent peripheral devices.
In accordance with one embodiment of the invention, a method is provided for programming a programmable circuit. The method includes providing an interface for allowing a user to graphically define at least one type of input data unit that is expected to be received at the programmable circuit. A visual representation of the input data format corresponding to the defined type of input data unit is presented to the user. The user is allowed to graphically manipulate the visual representation of the input data format to graphically transform the input data format to a visual representation of a desired output data format of output data units to be output from the programmable circuit. Program code is automatically generated for directing the programmable circuit at run-time deployment to transform actual input data units of the defined type of input data units to actual output data units having the desired output data format in a manner corresponding to the graphical transformation of the visual representations of the input data format to the desired output data format.
In accordance with another embodiment of the invention, a method for programming a programmable circuit is provided, where a visual representation of at least one expected data protocol format for data packets that will be input to the programmable circuit is displayed. A graphical user interface is provided to allow a user to graphically edit one or more data fields associated with the visual representation of the expected data protocol format to produce a visual representation of a desired data protocol format for transformed data packets that are to be output from the programmable circuit. Program code is automatically generated for use by the programmable circuit to transform the data packets that are received at the programmable circuit to the transformed data packets that are output from the programmable circuit. The resulting transformation of the data packets at the programmable circuit corresponds to the graphical transformation effected via the graphical user interface.
In accordance with another embodiment of the invention, a graphical programming tool for generating program code operable on a programmable circuit having a circuit programming interface is provided. The graphical programming tool includes a graphical user interface to display a visual representation of at least one expected data protocol format for data packets that will be input to the programmable circuit. The graphical user interface further allows the user to graphically edit one or more data fields associated with the visual representation of the expected data protocol format to produce a visual representation of a desired data protocol format for transformed data packets that are to be output from the programmable circuit. A processor is configured to automatically generate program code for use by the programmable circuit to transform the data packets that are received at the programmable circuit to the transformed data packets that are output from the programmable circuit. The resulting transformation of the data pac

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