Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-12-02
2008-12-09
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07464353
ABSTRACT:
A method for generating an integrated circuit (IC) is provided wherein signal delays are transferable across two synthesis libraries where each library is associated with a different IC fabrication process. The method initiates with describing an IC design through a hardware description language (HDL). The method includes identifying logic signal delay points within the HDL. Then, technology-independent logic signal delay code is inserted within the delay points of the HDL representation. A system for designing an IC is also provided.
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Dinh Paul
Seiko Epson Corporation
Watson Mark P.
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