Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-03-07
2006-03-07
Thompson, A. M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C326S039000, C257S691000
Reexamination Certificate
active
07010772
ABSTRACT:
A method for generating a superset pinout for a family of devices. First, a pinlist is defined for each device within the family of devices. Second, a superset listing of pins is generated from the pinlist. Third, the superset pinout for the family of devices is created from said superset listing of pins to eliminate potential footprint variations within the family of devices. Fourth, each pin of the superset pinout associated with each member of the family of devices is marked.
REFERENCES:
patent: 5128871 (1992-07-01), Schmitz
patent: 6120550 (2000-09-01), Southgate et al.
patent: 6181004 (2001-01-01), Koontz et al.
patent: 6320410 (2001-11-01), Malhotra et al.
patent: 6650142 (2003-11-01), Agrawal et al.
patent: 6671868 (2003-12-01), Lie
M. Tervonen et al., Integrated Computer Aided Design, Documentation and Manufacturing System for PCB Electronics, 20th Design Automation Conference, pp. 436-443, Jun. 1983.
Vinod Malhotra et al. , “Heterogeneous CPLD Logic Blocks”, U.S. Appl. No. 09/525,955, filed Mar. 15, 2000, U.S. Patent 6,320,410.
InfiniBand™ Architecture Specification vol. 1, Release 1.0.a, Jun. 19, 2001, pp. 1-913.
InfiniBand™ Architecture Specification vol. 2, Release 1.0.a, Jun. 19, 2001, pp. 1-631.
Christopher P. Malorana, PC
Cypress Semiconductor Corp.
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