Method and apparatus for generating multi-phase signals

Details Method and apparatus for generating multi-phase signals Method and apparatus for generating multi-phase signals

2007-10-17

2010-06-22

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S293000, C327S295000, C327S144000, C327S163000

Reexamination Certificate

active

07741890

ABSTRACT:
A method and apparatus for generating multi-phase clock signals. The multi-phase generating method includes: generating L reference clock signal groups having predetermined phase delay intervals from an external clock signal, wherein each reference clock signal group includes M sub reference clock signals; averaging phases of sub reference clock signals for each reference clock signal group, and generating L main reference clock signals from the L×M sub reference clock signals; and sequentially delaying the L main reference clock signals, and generating the N multi-phase clock signals having the different phases. Because a plurality of clock signals having equal phase delay intervals between each other are generated regardless of the frequency of a received clock signal, the yield of Delay Locked Loop (DLL) circuits is improved using the multi-phase generating apparatus.

REFERENCES:
patent: 6222406 (2001-04-01), Noda et al.
patent: 6657500 (2003-12-01), Chen
patent: 2001/0050581 (2001-12-01), Saeki
patent: 2003/0122604 (2003-07-01), Saeki
patent: 2001-007686 (2001-01-01), None

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