Method and apparatus for generating both a uniform duty cycle cl

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

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713501, G06F 104

Patent

active

060888113

ABSTRACT:
A method and apparatus for generating both a uniform duty cycle clock and a variable duty cycle clock with a single state machine. A single state machine is provided having a series of states through which it transitions when in a first mode. The series of states causes the output of the state machine to be a uniform duty cycle clock signal. The state machine has a second group of states through which it transitions in a second mode. A transition scheme among the second group of states permits the duty cycle of a state machine output clock signal to vary.

REFERENCES:
patent: 4161787 (1979-07-01), Groves et al.
patent: 5214682 (1993-05-01), Clark
patent: 5638016 (1997-06-01), Eitrheim

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