Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Patent
1997-09-30
2000-07-11
Butler, Dennis M.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
713501, G06F 104
Patent
active
060888113
ABSTRACT:
A method and apparatus for generating both a uniform duty cycle clock and a variable duty cycle clock with a single state machine. A single state machine is provided having a series of states through which it transitions when in a first mode. The series of states causes the output of the state machine to be a uniform duty cycle clock signal. The state machine has a second group of states through which it transitions in a second mode. A transition scheme among the second group of states permits the duty cycle of a state machine output clock signal to vary.
REFERENCES:
patent: 4161787 (1979-07-01), Groves et al.
patent: 5214682 (1993-05-01), Clark
patent: 5638016 (1997-06-01), Eitrheim
Iyer Venkat
Liew Vui Yong
Butler Dennis M.
Intel Corporation
LandOfFree
Method and apparatus for generating both a uniform duty cycle cl does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for generating both a uniform duty cycle cl, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for generating both a uniform duty cycle cl will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-553225