Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2001-06-29
2008-12-02
Ghebretinsae, Temesghen (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S240120, C348S419100, C348S497000
Reexamination Certificate
active
07460629
ABSTRACT:
A method and apparatus are disclosed for controlling a buffer in a digital audio broadcasting (DAB) communication system. The decoder buffer level limits are specified in terms of a maximum number of encoded frames (or duration). The transmitter can predict the number of encoded frames, Fpred, in the decoder buffer and transmit the value, Fpred, to the receiver with the audio data. If the transmitter determines that the decoder buffer level is becoming too high, the frames being generated by the encoder are too small and additional bits are allocated to each frame for each of the N programs. Likewise, if the transmitter determines that the decoder buffer level is becoming too low, the frames being generated by the encoder are too big and fewer bits are allocated to each frame for each of the N programs. The transmitted predicted buffer level, Fpred, can also be employed to (i) determine when the decoder should commence decoding frames; and (ii) synchronize the transmitter and the receiver. The receiver fills the decoder buffer until Fpredframes are received before commencing decoding frames when the decoder first starts up or possibly when a new audio program is selected. The transmitter and receiver clocks may be synchronized by adjusting the clock at the receiver by using a feedback loop that compares the actual level of the decoder buffer to the predicted value, Fpred, received from the transmitter (a higher number of encoded frames in the buffer indicates that the clock of the receiver is too slow and should be increased, and a lower number of encoded frames in the buffer indicates that the clock of the receiver is too fast and needs to be slowed down).
REFERENCES:
patent: 5159447 (1992-10-01), Haskell et al.
patent: 5164828 (1992-11-01), Tahara et al.
patent: 5390299 (1995-02-01), Rege et al.
patent: 5592584 (1997-01-01), Ferreira et al.
patent: 5619341 (1997-04-01), Auyeung et al.
patent: 5844867 (1998-12-01), De Haan et al.
patent: 5859660 (1999-01-01), Perkins et al.
patent: 5901149 (1999-05-01), Itakura et al.
patent: 5918073 (1999-06-01), Hewitt
patent: 5920732 (1999-07-01), Riddle
patent: 5958027 (1999-09-01), Gulick
patent: 6151359 (2000-11-01), Acer et al.
patent: 6233226 (2001-05-01), Gringeri et al.
patent: 6247072 (2001-06-01), Firestone
patent: 6347380 (2002-02-01), Chang et al.
patent: 6463410 (2002-10-01), Fuchigami et al.
patent: 6487535 (2002-11-01), Smyth et al.
patent: 6560199 (2003-05-01), Hoshino
patent: 6674797 (2004-01-01), Golin
patent: 6683889 (2004-01-01), Shaffer et al.
patent: 6701372 (2004-03-01), Yano et al.
patent: 6741648 (2004-05-01), Karczewicz et al.
patent: 6757659 (2004-06-01), Tanaka et al.
patent: 6819727 (2004-11-01), Cucchi et al.
Faller Christof
Haimi-Cohen Raziel
Agere Systems Inc.
Ghebretinsae Temesghen
Ryan & Mason & Lewis, LLP
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