Method and apparatus for fixing bit errors encountered...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

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07127643

ABSTRACT:
One embodiment of the present invention provides a system that fixes bit errors encountered during references to a cache memory. During execution of an application, the system performs a reference to the cache memory by retrieving a data item and an associated error-correcting code from the cache memory. Next, the system computes an error-correcting code from the retrieved data item and compares the computed error-correcting code with the associated error-correcting code. If the computed error-correcting code does not match the associated error-correcting code a bit error has occurred. In this case, the system stores an identifier for the reference in a register within a set of one or more registers associated with the cache memory, so that the bit error can be fixed at a later time. The system also allows the application to continue executing.

REFERENCES:
patent: 4598402 (1986-07-01), Matsumoto et al.
patent: 5226150 (1993-07-01), Callander et al.
patent: 6038693 (2000-03-01), Zhang
patent: 6502218 (2002-12-01), George et al.
patent: 6571317 (2003-05-01), Supnet
patent: 6961824 (2005-11-01), Rowlands et al.

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