Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-11-17
2000-08-01
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711 3, 711144, 711137, 711201, 711213, G06F 1200
Patent
active
060981504
ABSTRACT:
The present invention relates to a method and apparatus for efficiently outputting words from an N-way set-associative cache. In one embodiment, the cache tags contain information indicating which set contains a line holding data succeeding the last word in the line accessed during a cache read. For a cache which outputs M words for each access, when the addressed word is within M-1 words of the end of the line, the cache will output all the words from the accessed word to the end of the line and the remainder of the M words from a succeeding line in whatever set is indicated by the pointer.
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Brethour Vernon
Heald Raymond A.
Chan Eddie P.
Kim Hong
Sun Microsystems Inc.
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