Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1994-06-23
1999-07-27
DeCady, Albert
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 14, 714 10, G06F 1100
Patent
active
059283688
ABSTRACT:
Multiple processors are connected to form a multiprocessor system having interprocessor communicating capability. In the face of a power-fail signal, indicating that possible power loss is imminent, a processor will proceed through a shut-down procedure to save the present operating state so that when power is re-applied the processor can continue from the operating state it left when power was lost. The shut-down procedure concludes with the processor broadcasting messages to all other processors that it is undergoing a power-fail shut-down which is noted by the other processors to later cause them to enter a cautious mode of operation so as to not exclude the processor in any system configuration involving agreement of all processors by reason of the processor's loss of power.
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Collins Richard M.
Jardine Robert L
Reeves Larry D.
De'cady Albert
Elisea Pierre
Tandem Computers Incorporated
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