Method and apparatus for facilitating debugging of an...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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C712S227000

Reexamination Certificate

active

07444549

ABSTRACT:
One embodiment of the present invention provides a system that facilitates debugging an integrated circuit without probing signal lines within the integrated circuit. During operation the system updates a performance counter within the integrated circuit based on the occurrence of one or more performance events. Note that some integrated circuits already include a performance counter which is used to measure the performance of the integrated circuit. Next, the system triggers a debugging operation based on the content of the performance counter, thereby facilitating debugging of the integrated circuit without probing signal lines within the integrated circuit. By using the performance counter to trigger the debugging operation in addition to measuring performance, the present invention can substantially reduce the amount of additional circuitry required to facilitate debugging of the integrated circuit.

REFERENCES:
patent: 6948098 (2005-09-01), Pillay et al.
patent: 7013409 (2006-03-01), Gergen et al.
patent: 7237149 (2007-06-01), Moyer et al.
patent: 7266728 (2007-09-01), Edwards et al.
patent: 2003/0051192 (2003-03-01), Pillay et al.
patent: 2004/0236992 (2004-11-01), Adkisson et al.
patent: 2006/0013294 (2006-01-01), Regnier
patent: 2006/0225050 (2006-10-01), Thekkath

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