Method and apparatus for facilitating circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000

Reexamination Certificate

active

07448013

ABSTRACT:
There is disclosed a system for designing circuits which involves pre-placing delay elements between circuit components susceptible to shoot-through due to effects of clock skew, each delay element having a physical form and at least one input terminal and at least one output terminal; determining which delay elements are not critical in preventing shoot-through; removing non-critical delay elements from the circuit; and replacing each removed delay element with a cell having a physical form equivalent to the physical form of the removed delay element and a wire connection between an input and an output of the cell equivalent to an input and output of the delay element. This wire cell has the effect of removing the delay element from the circuit without having to reposition the circuit components. This has the result that it is not necessary to re-position circuit components on the removal of delay elements and then to re-evaluate the circuit performance. Circuit design can be significantly improved.

REFERENCES:
patent: 5173864 (1992-12-01), Watanabe et al.
patent: 6510549 (2003-01-01), Okamura
patent: 6625787 (2003-09-01), Baxter et al.
patent: 6839886 (2005-01-01), Wallace
patent: 6872601 (2005-03-01), Baxter et al.
patent: 6925622 (2005-08-01), Reyes
patent: 7275232 (2007-09-01), Schleicher et al.

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