Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2011-07-05
2011-07-05
Dole, Timothy J (Department: 2831)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S686000, C324S690000, C324S715000
Reexamination Certificate
active
07973541
ABSTRACT:
Techniques for estimating resistance and capacitance of metal interconnects are described. An apparatus may include an interconnect, a set of pads, a set of isolation circuits, and a test circuit. The set of pads may be coupled to the interconnect and used for simultaneously applying a current through the interconnect and measuring a voltage across the interconnect. The current and voltage may be used to estimate the resistance of the interconnect. The test circuit may charge and discharge the interconnect to estimate the capacitance of the interconnect. The isolation circuits may isolate the pads from the interconnect when the test circuit charges and discharges the interconnect. The apparatus may further include another interconnect, another set of pads, and another set of isolation circuits that may be coupled in a mirror manner. Resistance and/or capacitance mismatch between the two interconnects may be accurately estimated.
REFERENCES:
patent: 5006808 (1991-04-01), Watts
patent: 5744964 (1998-04-01), Sudo et al.
patent: 5801394 (1998-09-01), Isobe
patent: 6404222 (2002-06-01), Fan et al.
patent: 6528818 (2003-03-01), Satya et al.
patent: 6819123 (2004-11-01), Marshall et al.
patent: 6836133 (2004-12-01), Kinoshita
patent: 6856143 (2005-02-01), McNutt et al.
patent: 6876208 (2005-04-01), Kunikiyo et al.
patent: 6894520 (2005-05-01), Yamashita et al.
patent: 7026646 (2006-04-01), Cowles et al.
patent: 7099808 (2006-08-01), Suaya et al.
patent: 7230435 (2007-06-01), Kunikiyo et al.
patent: 7344899 (2008-03-01), Lunde
patent: 7487064 (2009-02-01), Lim
patent: 7529318 (2009-05-01), Huber
patent: 2001/0033177 (2001-10-01), Lindolf et al.
patent: 2006/0220012 (2006-10-01), Wu et al.
patent: 2007/0093172 (2007-04-01), Zheng
patent: WO2007093172 (2007-08-01), None
Ajioka Y et al: “Test structure measuring inter- and intralayer coupling capacitance of interconnection with subfemtofarad resolution” IEEE Transactions on Electron Devices, IEEE Service Center, Pisacataway, NJ, US, vol. 51, No. 5, May 1, 2004, pp. 726-735, XP011113443 ISSN: 0018-9383.
Dennis Sylvester et al: “Analytical Modeling and Characterization of Deep-Submicrometer Interconnect” Proceedings of the IEEE, IEEE. New York, US, vol. 89, No. 5, May 1, 2001, XP011044509 ISSN: 0018-9219.
International Search Report and Written Opinion—PCT/US2008/085740, International Search Authority—European Patent Office—0/17/2009.
Bang David
Du Yang
Jayapalan Jayakannan
Dole Timothy J
Kordich Donald C.
Qualcomm Incorporated
Zhu John
LandOfFree
Method and apparatus for estimating resistance and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for estimating resistance and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for estimating resistance and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2642755