Method and apparatus for error management in a solid state disk

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

711103, 39518204, G06F 1216, G06F 1108

Patent

active

058754776

ABSTRACT:
A method of accessing a memory includes the step of partitioning the memory into a plurality of partitions. A primary logical identifier is stored in the memory to identify each partition. A redundant secondary logical identifier is also stored in the memory to identify each partition. In response to a requested partition number identifying a partition to access, at least one partition of data is located using a first stored logical identifier formed from a portion of each of the primary and secondary logical identifiers. The at least one partition of data is then identified using a second stored logical identifier formed from a portion of at least one of the primary and secondary logical identifiers. In one embodiment, a first error detection code (EDC) stored in the header is used to validate the partition data. If an error is detected, the validity of the partition data is tested using an EDC computed by ANDing the first EDC and a second EDC stored in the header. During a clean-up operation, a header is selected from a block targeted for clean-up. The first and second stored logical identifiers in the selected header are compared with each other. If there is not a match, then validation is performed using the ANDed value of the first and second stored logical sector number. In one embodiment, the memory is a flash electrically erasable programmable read only memory. In one embodiment, the partitions are sectors and the identifiers are sector numbers.

REFERENCES:
patent: 5070474 (1991-12-01), Tuma et al.
patent: 5131089 (1992-07-01), Cole
patent: 5200959 (1993-04-01), Gross et al.
patent: 5394362 (1995-02-01), Banks
patent: 5479633 (1995-12-01), Wells et al.
patent: 5535369 (1996-07-01), Wells et al.
patent: 5581723 (1996-12-01), Hasbun et al.
patent: 5586285 (1996-12-01), Hasbun et al.
patent: 5603001 (1997-02-01), Sukegawa et al.
patent: 5640529 (1997-06-01), Hasbun
patent: 5737742 (1998-04-01), Achiwa et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for error management in a solid state disk does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for error management in a solid state disk , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for error management in a solid state disk will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-315936

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.