Method and apparatus for erasing an array of electrically erasab

Static information storage and retrieval – Read/write circuit – Erase

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365185, G11C 1140

Patent

active

054885868

ABSTRACT:
An apparatus and method of erasing memory cells while preventing overerasure of the memory cells is disclosed. By applying a large voltage across the floating gate of the memory cells, charge is removed from the floating gate. Once sufficient charge is removed from the floating gates of the memory cells to render them erased, a stop transistor halts the erasure process, thus preventing the overerasure of memory cells.

REFERENCES:
patent: 5138576 (1992-08-01), Madurawe
patent: 5220533 (1993-06-01), Turner

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