Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-01-03
2006-01-03
Padmanabhan, Mano (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S141000, C711S148000, C711S152000, C711S167000
Reexamination Certificate
active
06983353
ABSTRACT:
A method and apparatus for assuring data consistency during certain operations involving dependent input/output sequences. During such operations a stall application blocks write operations to specified logical devices in a local consistency group while allowing read operations to all devices and write operations to non-specified logical devices. When a write command is directed to a logical device in local consistency group, the host adapter associated with the logical device returns a message to the host that initiates a write command retry. Retries generally continue until a write command is successful.
REFERENCES:
patent: 6101497 (2000-08-01), Ofek
patent: 6370626 (2002-04-01), Gagne et al.
patent: 6785793 (2004-08-01), Aboulenein et al.
patent: 2001/0021967 (2001-09-01), Tetrick
Don Arieh
LeCrone Douglas E.
Tamer Philip E.
EMC Corporation
Herbster George A.
Padmanabhan Mano
Rojas Midys
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