Method and apparatus for encoding and decoding data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S774000

Reexamination Certificate

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10874611

ABSTRACT:
A method for interlacing columns of different weights is proposed for a parity-check matrix H that results in good performing LDPC codes shortened or unshortened. Matrix H comprises a section H1and a section H2, and wherein H1has a plurality of different column weights and comprises a plurality of sub-matrices where columns of at least one weight are substantially interlaced between the sub-matrices.

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Rao et al, Error-Control Coding for Computer Systems, Prentice-Hall, 1989, pp. 140, 194, 228.

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