Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1996-12-11
1999-01-12
Swann, Tod R.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711 1, 711 2, 711 3, 711202, 711206, 711207, 711208, 711203, 39518218, 395710, G06F 1200
Patent
active
058601414
ABSTRACT:
A method and apparatus for enabling a physical memory larger than a corresponding virtual memory. An apparatus is disclosed that includes a processor having an address word of a predefined length, a main memory having a size larger than the addressable range of the predefined address word, and virtual memory logic for configuring the processor virtual memory to contain a subset of the main memory as resident memory and pointers to the remainder of main memory. Analogous method steps are disclosed as is dividing main memory into a plurality of buffer uniquely identifiable within the address range of the predefined address word.
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Barton Richard R.
Boland Vernon K.
Washington Peter
Waters John H.
Adamson Steven J.
Moazzami Nasser
NCR Corporation
Swann Tod R.
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