Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1997-09-23
2000-05-23
Sheikh, Ayaz R.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
710128, 710131, 711149, 711150, 36523005, G06F 1314
Patent
active
060675950
ABSTRACT:
An intelligent data bus interface using a triple-port memory having three independent data ports that provide simultaneous access to the data stored in the memory to two bi-directional data buses and to a data processor. The two data buses and the processor are coupled to separate data ports and each is able to independently access data in the triple-port memory at the full data rate of each. Because of the use of the triple-port memory, no data copying or moving is required in order to provide access to the data to the processor or the data buses. The intelligent data bus interface is particularly suitable for handling encryption/decryption, network protocol and PCI/SCI bridging at full speed at any of its ports without burdening a host processor.
REFERENCES:
patent: 3787818 (1974-01-01), Arnold et al.
patent: 4564782 (1986-01-01), Smitt
patent: 4937788 (1990-06-01), Harada
patent: 5130981 (1992-07-01), Murphy
patent: 5214760 (1993-05-01), Hammond et al.
patent: 5440523 (1995-08-01), Joffe
patent: 5459851 (1995-10-01), Nakajima et al.
patent: 5586299 (1996-12-01), Wakerly
patent: 5590087 (1996-12-01), Chung et al.
patent: 5640456 (1997-06-01), Adams, Jr. et al.
patent: 5659518 (1997-08-01), McLaudy
patent: 5659687 (1997-08-01), Kim et al.
patent: 5734847 (1998-03-01), Garbus et al.
patent: 5737569 (1998-04-01), Nadir et al.
patent: 5748921 (1998-05-01), Lambrecht et al.
patent: 5790883 (1998-08-01), Sugita
patent: 5793996 (1998-08-01), Childers et al.
patent: 5799209 (1998-08-01), Chatter
patent: 5828623 (1998-10-01), Dilbeck
patent: 5875470 (1999-02-01), Dreibelbis et al.
patent: 5901328 (1999-05-01), Ooe
iCore Technologies, Inc.
Phan Raymond N
Sheikh Ayaz R.
LandOfFree
Method and apparatus for enabling high-performance intelligent I does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for enabling high-performance intelligent I, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for enabling high-performance intelligent I will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1844427