Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-03-06
2007-03-06
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S758000
Reexamination Certificate
active
10509478
ABSTRACT:
A method of embedding an additional layer of error correction into an error correcting code, where information is encoded into code words that are arranged in columns of a code block. The method includes reducing the length of each row of the code block by adding row symbols together according to a predetermined adding rule resulting in a reduced code block; encoding the shortened rows of the reduced code block using a horizontal error correcting code to obtain horizontal parities; and embedding the horizontal parities as additional layer in the error correcting code.
REFERENCES:
patent: 5247523 (1993-09-01), Arai et al.
patent: 5740186 (1998-04-01), Widmer
patent: 5757825 (1998-05-01), Kimura et al.
patent: 5784387 (1998-07-01), Widmer
patent: 6581178 (2003-06-01), Kondo
patent: 6604217 (2003-08-01), Kahlman
patent: 6621982 (2003-09-01), Kimura et al.
patent: 2001/0050622 (2001-12-01), Hewitt et al.
patent: 2002/0147954 (2002-10-01), Shea
patent: WO 0007300 (2000-02-01), None
Van Dijk Marten Erik
Yamamoto Kouhei
Belk Michael E.
Chaudry Mujtaba
Koninklijke Philips Electronics , N.V.
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