Method and apparatus for eliminating the software generated...

Details Method and apparatus for eliminating the software generated... Method and apparatus for eliminating the software generated...

2005-03-01

2005-03-01

Ray, Gopal C. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S312000, C710S309000, C710S240000, C710S105000, C710S220000, C370S402000, C711S118000, C711S141000

Reexamination Certificate

active

06862646

ABSTRACT:
The specification discloses a method and related system that allows hardware devices to participate in the coherency domain of a computer system. More particularly, hardware devices such as network interface cards, audio cards, input/output cards, and the like, are allowed to participate on at least a limited basis in the coherency domain by having cache memory that duplicates a FIFO buffer in main memory used to exchange information between software and the hardware. To exchange information, software writes to the FIFO buffer which invalidates the data in the cache-type memory of the hardware device, and the invalidation message acts to notify the hardware device of the availability of information in the FIFO buffer.

REFERENCES:
patent: 5113514 (1992-05-01), Albonesi et al.
patent: 6122659 (2000-09-01), Olnowich
patent: 6182176 (2001-01-01), Ziegler et al.
patent: 6304932 (2001-10-01), Ziegler et al.
“Photonic architectures for distributed shared memory multiprocessors” by Dowd, P.W.; Chu, J. (abstract only) Publication Date: Apr. 26-27, 1994.

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