Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2007-04-17
2007-04-17
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
Reexamination Certificate
active
10735054
ABSTRACT:
A method and apparatus is provided to manage data in computer registers in a program, making more computer registers available to one or more programmers utilizing a name level instruction. The method and apparatus disclosed herein presents a way of reducing the overhead of register management, by introducing a concept of a name level for each of the named architected registers in a processor. The method provides a programmer with a larger register name-space while not increasing the size of the instruction word in the processor instruction-set architecture. It also provides for the facilitation of architectural features which overload the architected register namespace and ease the overhead of register management. This provides for the addition of more computer registers without changing the instruction format of the computer.
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Altman Erik R.
Eichenberger Alexandre E.
Sathaye Sumedh W.
Wellman John-David
Coleman Eric
Harrington & Smith ,LLP
International Business Machines - Corporation
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