Method and apparatus for electronically aligning...

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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C257S686000

Reexamination Certificate

active

07994501

ABSTRACT:
Embodiments of the present invention provide a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system selects a group of transmitter mini-bars on the first chip to form a transmitter bit position and selects a group of receiver mini-bars on the second chip to form a receiver bit position. The system then associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.

REFERENCES:
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patent: 6559531 (2003-05-01), Sutherland
patent: 6600325 (2003-07-01), Coates et al.
patent: 6728113 (2004-04-01), Knight et al.
patent: 6812046 (2004-11-01), Drost et al.
patent: 6916719 (2005-07-01), Knight et al.
patent: 7276928 (2007-10-01), Neaves et al.
patent: 2003/0065473 (2003-04-01), Kux et al.
patent: 2004/0018654 (2004-01-01), Drost et al.
patent: 2005/0054139 (2005-03-01), Drost et al.

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