Error detection/correction and fault detection/recovery – Data processing system error or fault handling
Patent
1996-03-06
1998-12-08
Swann, Tod R.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
711118, 711217, 711219, G06F 1200, G06F 1206
Patent
active
058484361
ABSTRACT:
A method and apparatus for causing a data line to be fetched in an order consistent with the data structure of a processor's modified little endian mode or big endian mode of operation is accomplished when the processor requests a particular word that is not currently stored in cache memory. The request includes an address of the particular word and an indication is provided as to whether the processor is operating in the modified little endian mode or the big endian mode. A memory manager, upon receiving the request, retrieves a line of data from memory (storage device) based on the address and the mode of operation. For example, when the big endian mode is used, the line of data is retrieved using a target word first ordering and when the modified little endian mode is used, the line of data is retrieved using a reverse target word first ordering.
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Sartorius Thomas Andrew
Schaffer Mark Michael
Flynn John D.
International Business Machines - Corporation
King , Jr. Conley B.
Phillips Steven B.
Swann Tod R.
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