Method and apparatus for efficiently accessing both aligned...

Details Method and apparatus for efficiently accessing both aligned... Method and apparatus for efficiently accessing both aligned...

2007-11-27

2007-11-27

Nguyen, T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S201000

Reexamination Certificate

active

11055828

ABSTRACT:
A technique for improving access times when accessing memory, such as when accessing data from cache. By a unique manipulation and usage of a specified memory address in combination with the cache's internal organization, the address range required by the requested data can be covered by one odd and one even segment of the cache, where the odd segment is always at the base address created by the summation of the source operands and set to the odd segment, and the even address is created by summation of the source operands plus an offset value equivalent to the size of the cache line. This structural regularity is used to efficiently generate both the even and odd addresses in parallel to retrieve the desired data.

REFERENCES:
patent: 5606520 (1997-02-01), Gove et al.
patent: 2002/0116567 (2002-08-01), Vondran, Jr.

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