Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1997-01-31
2001-07-24
Courtenay, III, St. John (Department: 2151)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
06266736
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to updating compressed information such as software codes in non-volatile memory. In particular, this invention relates to a method to load new software into a non-volatile memory while retaining the old software to prevent loss of information integrity in case of power failure.
2. Description of Related Art
Aircraft In-Flight Entertainment Systems (IFES) provide a variety of services to passengers during flight. Some examples of these services are music, radio programs, TV programs, video on demand, and games. Typical IFES involve a number of processors executing programs for specific tasks. Some programs also execute from and access data in non-volatile memory. Non-volatile memories containing program codes and data are usually implemented by flash electrically erasable programmable read only memories (EEPROMs) due to their popularity in recent years. In the following, the term “information” will be used to describe the codes and data.
Information including programs or data used in IFES may require several revisions during their life cycle. IFES services are highly technology-dependent; therefore when technology changes, the associated information may have to be revised accordingly. In addition, IFES services are also driven by the needs of customers. When customers' needs change, information has to be replaced by new versions reflecting these changes.
Because IFES information may be revised and/or updated quite frequently, it is desirable to update the information in the field rather than during regular maintenance periods. The updating should be as fast as possible to minimize system downtime during “switching over” period. Most importantly, the updating should not be compromised by other temporary system malfunctions such as power failure.
When the information is stored in the flash memory devices, revisions can be made by erasing the old information and loading the new information into the erased devices. Due to the in-circuit programmability of flash memory devices, the method of loading new information can be carried out in the field when the device is still powered. The new information can be transmitted to the field through any data communication method. However, the loading of the new information may take some time because the process of writing to the flash memory is relatively slow. During this time, temporary system malfunctions such as a power failure could interrupt the process. The result of this interruption could be disastrous if at the time of the power failure the old information has already been erased completely and the new information is only partially loaded into the flash memory. In this situation, when power is restored, the system boots up with only partially loaded new information. Needless to say, this scenario may lead to catastrophic consequences to the IFES.
It is, therefore, desirable to have a method to load the new information into the flash memory efficiently to reduce the loading time and at the same time to avoid compromising the information integrity during power failure.
SUMMARY OF THE INVENTION
A method of loading in the field a new version of information including code and data into a non-volatile memory device such as a flash memory, to replace a current version of information by a host processor. The non-volatile memory containing the information is partitioned into at least, but not limited to, two sections: one section contains the current information and one section contains the new information. A pointer located in the non-volatile memory is used to point to the current section. During program execution, only the current section is available to the processor. During the update process, the new information is loaded into the section that does not contain the current valid information. After the download and storing of the new information is complete, the new information is validated using a checksum algorithm and the pointer is then updated to point to the newly validated section.
To further improve the efficiency of the loading and reduce the size of the flash memory, the information is stored in the flash memory in compressed form. At boot-up, the processor decompresses and transfers the information to a random access memory (RAM) for program execution or data processing.
REFERENCES:
patent: 5210854 (1993-05-01), Beaverton et al.
patent: 5226168 (1993-07-01), Kobayashi et al.
patent: 5361343 (1994-11-01), Kosonocky et al.
patent: 5379342 (1995-01-01), Arnold et al.
patent: 5430866 (1995-07-01), Lawrence et al.
patent: 5437018 (1995-07-01), Kobayashi et al.
patent: 5440337 (1995-08-01), Henderson et al.
patent: 5481701 (1996-01-01), Chambers, IV
patent: 5530847 (1996-06-01), Schieve et al.
patent: 5532964 (1996-07-01), Cernea et al.
patent: 5701492 (1997-12-01), Wadsworth et al.
patent: 5897597 (1999-04-01), O'Daniel
Atkinson Michael R.
Auerbach Russell
Blakely , Sokoloff, Taylor & Zafman LLP
Courtenay III St. John
Sony Corporation
LandOfFree
Method and apparatus for efficient software updating does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for efficient software updating, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for efficient software updating will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2513234