Electrical computers and digital processing systems: interprogra – Event handling or event notification
Reexamination Certificate
2006-08-21
2008-12-02
William, Thomson D. (Department: 2194)
Electrical computers and digital processing systems: interprogra
Event handling or event notification
C377S026000, C377S037000
Reexamination Certificate
active
07461383
ABSTRACT:
A system for monitoring a large number of simultaneous events implements a hybrid counter array device having a first counter portion comprising counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. A second counter portion comprises a memory array device having addressable memory locations in correspondence with the counter devices, each addressable memory location for storing a second count value representing higher order bits. A control device monitors each of the counter devices and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location. The system includes interrupt pre-indication for providing fast interrupt trigger to a processor device when a count value related to an event equals a threshold value. A data transfer sub-system additionally enables one or more of: read access or write access to both the count values in the first and second counter portions over a narrow bus, the read/write access for purposes of initializing and determining status of the count values for a monitored event type in response to a processor device request.
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Gara Alan G.
Gschwind Michael K.
Salapura Valentina
International Business Machines - Corporation
Morris, Esq. Daniel P.
Scully , Scott, Murphy & Presser, P.C.
Verdi KimbleAnn
William Thomson D.
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