Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1996-06-28
1999-01-12
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711113, G06F 1200
Patent
active
058600914
ABSTRACT:
Methods and associated apparatus in a RAID storage subsystem to enhance the performance of write operations for sequences of large buffers generally non-aligned with stripe boundaries in the RAID storage subsystem. In particular, the methods identify a starting non-aligned portion of each large buffer to be written to the RAID storage subsystem, an ending non-aligned portion of each large buffer to be written to the RAID subsystem, and a larger middle portion of the large buffer to be written to the RAID subsystem which is aligned with stripe boundaries of the RAID storage subsystem. The stripe-aligned middle portion is written to the RAID storage devices in a cache write through mode using stripe write operations to maximize data throughput. The starting and ending portions identified by the methods of the present invention are written to the cache memory in a write back mode such that they will eventually be posted to the RAID storage devices in due course through normal RAID processing. Special case processing of the methods of the present invention note the absence of a starting or ending non-aligned portions (e.g., a buffer having no non-aligned starting portion, or no non-aligned ending portion, or neither starting nor ending non-aligned portions).
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DeKoning Rodney A.
Fredin Gerald J.
Bailey Wayne P.
Fishman Daniel N.
King , Jr. Conley B.
Swann Tod R.
Symbios, Inc.
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