Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-03-15
2005-03-15
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06868529
ABSTRACT:
An apparatus is described having a plurality of grant generation units. The plurality of grant generation units are arranged according to a round robin grant eligibility hierarchy, such that, one grant generation unit exists for each of a plurality of request agents. A grant generation unit is chosen to provide an output specifying which request agent, from the plurality of request agents is to receive a grant. The chosen grant generation unit is chosen because its corresponding request agent is the next request agent in the round robin grant eligibility hierarchy to be recognized as being eligible for a grant.
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Levin Naum
Siek Vuthe
Turin Networks
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