Method and apparatus for effectively re-downloading data to...

Details Method and apparatus for effectively re-downloading data to... Method and apparatus for effectively re-downloading data to...

2006-10-03

2006-10-03

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S037000, C326S039000, C326S040000, C326S041000, C326S047000, C716S030000

Reexamination Certificate

active

07116130

ABSTRACT:
A method for effectively re-downloading data to a Field Programmable Gate Array (FPGA). The method uses two Complex Programmable Logic Devices (CPLDs) to implement control functions of Write-to-Non-Volatile Random Access Memory (NVRAM) and Write-to-FPGA respectively, in conjunction with a set of connectors with a detection circuit, such that according to a detection state output by the detection circuit to one CPLD implemented with Write-to-FPGA control function, a write-to-NVRAM operation for data is determined if the detection state is logic low and conversely data is written from the NVRAM to the FPGA.

REFERENCES:
patent: 5831448 (1998-11-01), Kean
patent: 6211695 (2001-04-01), Agrawal et al.
patent: 6460094 (2002-10-01), Hanson et al.
patent: 6907595 (2005-06-01), Curd et al.
patent: 6938177 (2005-08-01), Blemel
patent: 1284681 (2001-02-01), None

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