Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
Reexamination Certificate
1998-12-01
2003-08-26
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Instruction modification based on condition
C712S211000, C712S229000, C712S043000, C712S245000
Reexamination Certificate
active
06611909
ABSTRACT:
The present invention relates to a method and a device for instruction decoding in a digital processor.
BACKGROUND
An execution unit of a computer such as a microprocessor sometimes includes support for a trace function. Tracing is used by an assembler programmer to follow the execution of a program executed by the processor. When a trace condition is met, information on the current state of registers in the processor is output to a printer connected to the microprocessor or to a file in some mass storage used by the microprocessor.
A trace condition can be a multitude of different things, or in other words, there are many different events that can trigger the trace function. Example of such events can be:
the execution of every instruction;
the execution of only such instructions which include a jump that is taken;
the execution of only instructions having an assembler address matching an address entered into a monitoring system for the trace condition;
that a task or job is finished or that the execution of a program module is finished or that a switch from one job to another job is done, such as for an interrupt condition.
The trace function is used when debugging a program executed in the microprocessor. The trace function then enables the assembler programmer or “debugger”, i.e. the person who has the task of correcting errors in the written program code, to follow the program flow which is made by e.g. checking whether an instruction at a certain address is executed or not. The trace function is a very powerful tool when debugging. A trace function can generally be implemented by modifying the original program code by introducing suitable instructions called break-points. However, such an introduction of additional instructions will change the length of the program and also highly affect the timing of the execution of the different instructions of the program code. Microprocessors having built-in tracing functions allow a tracing to be made without affecting the original program code, not changing the time required for executing instructions as much as in the case where additional break-instructions have to be entered in the code.
A microprocessor of the type having a high performance and operating at high speed conventionally has an execution core which in most cases uses microcode, which comprises microinstructions or microinstruction codes. The microinstructions are thus the instructions which are actually executed by the execution core or arithmetic and logical core of the processor. The microinstructions are obtained by translating the original program code in an instruction decoder comprised in the processor, before actually executing the instructions in the execution core. In order that a microprocessor shall support tracing, this function is generally incorporated in the microcode, which thus comprises support for enabling the trace functions. In a microprocessor allowing tracing usually a master signal is used for enabling all types of traces, this master signal being called a trace enable signal.
Furthermore, when executing microcode in a microprocessor having a trace function, the processor has to check all microinstructions in the microcode for the trace conditions. Such constant checking costs a share of the execution time of the processor even in the case where the trace condition is not enabled, since then at least the trace enable signal has to be checked for each microinstruction.
This may even result in that the microcode or microprogram has to contain additional microinstructions in order to check whether the trace function is enabled or not. The existence of such additional microinstructions naturally cause delays compared to the case where they are not included in the microcode. Such delays will then somewhat slow down the computer and will reduce its performance, and are hence generally not desired.
For processors e.g. used for special purposes there may also occur that other conditions or control signals have to influence the decoding or translating of program instructions into microinstructions. Thus, the translating of a program instruction signifying “End Of Job” can result in different microinstructions depending on the situation, i.e. whether this instruction signifies the end of a local or a global job or signifies the start of a new job.
In the published International patent application WO 92/02883 parallel-processing systems are disclosed, in which each of a plurality of processors receives the same microcode instructions. Each processor has an instruction decode logic circuit. The decode circuit also receives a condition signal derived from internal and/or external signals, so that the circuit will decode conditional instructions differently in dependence upon the condition signal. As specified on pages 55-58 the microcodes are thus extended by one extra condition bit. Such an addition will obviously require a more complex decoding of microinstructions when actually executing them which results in a lower processing rate.
In U.S. Pat. No. 5,617,574 a data processing device is disclosed in which conditional instructions in the conventional way can test status bits.
SUMMARY
It is an object of the present invention to provide a method and a device for providing a versatile translation of program instructions to be executed by a processor to microinstructions used by the core of the processor.
It is another object of the present invention to provide a method and a device by means of which the delay problem associated with having additional microinstructions inside the microprogram for checking whether the trace function is active is reduced.
A problem to be solved by the invention is thus how to arrange the decoding of “ordinary” program instructions into microinstructions in a way which will cause as little delays as possible for a processor having an optional tracing function.
The objects as mentioned above and others are generally obtained by supplementing the instruction decoder of a microcomputer with at least one additional signal, which signal indicates a state of the computer or of the processing made in the computer, such as whether or not a trace function is used. Depending on the value or values of the at least one additional signal, e.g. depending on whether the trace function is used or not, the decoding of the operation codes is altered so that for at least one input instruction different microinstructions are executed for different values of the at least one signal, i.e. in the respective particular case, so that for the state comprising that tracing is used at least one input instruction is translated to a microinstruction different from that microinstruction into which it would have been translated in the case where tracing is not enabled.
This results in the particular case as described above in that when the supplementary trace signal is switched off a microprogram not using trace functions or trace checks is run in the computer or microprocessor, and if the trace signal is switched on other microinstructions, supporting the trace function are executed by the computer. By not using microinstructions supporting a trace function, when such a function is not needed, execution time in the processor is saved, which in turn increases the performance of the computer, the computer still allowing that the trace function can be enabled when required or wanted.
Hence, the start address of a microcode sequence corresponding to an assembler instruction is determined by the operation code found in the assembler instruction. If the operation code is extended by a bit controlled by a signal, a trace enable signal, it is possible to execute two different microcode sequences depending on if the trace function is enabled or not.
The microcode, which is run when trace enable is set, checks for all trace conditions, while the other sequence does not have to check for trace at all. This arrangement therefore increases the capacity when trace is not enabled.
Additional objects and advantages of the invention will be set forth in the description w
Halvarsson Dan
Jonsson Tomas
Roos Tobias
Ellis Richard L.
Telefonaktiebolaget LM Ericsson (publ)
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