Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing
Reexamination Certificate
1998-11-23
2003-09-02
Elamin, Abdelmoniem (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output addressing
C340S870030, C345S156000, C345S163000
Reexamination Certificate
active
06615285
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for assigning bus addresses, and more particularly, to a method and apparatus for dynamically assigning bus addresses to hardware components installed on equipment, such as a cell station.
BACKGROUND OF THE INVENTION
Conventional cellular telephone systems include a central control station that interconnects the cellular telephone system with any suitable telephone switching system, such as the Public Switched Telephone Network (PSTN), and one or more cell stations. The cell stations are generally remote from the central control station and are typically placed throughout a cellular telephone service area. Telephone calls may be selectively placed by the central control station between standard land line telephone subscribers of the PSTN and a cellular telephone unit or directly between two cellular telephone units, in a known manner. For a more detailed description of a suitable cellular telephone system, see, for example, U.S. Pat. No. 4,829,554, incorporated by reference herein.
In order for a cell station to perform required functions, the cell station typically incorporates hardware components, often referred to as “circuit packs.” The same cell station, for example, might include a set of transceivers and other hardware equipment, such as control and timing boards, for communicating with cellular telephone units in a known manner. In addition, a cell station can include one or more interface boards for communicating, for example, on a T
1
line with a switch of the PSTN. In order for the cell station to properly communicate with and supervise each of the various hardware components, the cell station also includes a hardware controller. The hardware controller and each of the hardware components are typically stored by the cell station on a frame or rack.
In the event of a hardware component failure or when routine servicing is required, a given hardware component on a cell station might be replaced by a compatible piece of hardware, having a different manufacturer, model number or version. In addition, additional hardware components may be added to the cell station to increase the capacity of the cell station, or the cell station configuration may otherwise be modified. As each new hardware component is added to a cell station, the hardware component must typically be associated with a particular sector (antenna) and carrier frequency on the cell station.
Each hardware component typically communicates with the hardware controller and with one another on a common bus. In order to differentiate each hardware component on the common bus, each hardware component is assigned a unique address. The hardware controller maintains a directory that maps the sector and carrier frequency associated with each hardware component, as well as the corresponding bus address. The system configuration information stored by the hardware controller must match the physical hardware components that are actually installed on the cell station.
Some systems for determining system configuration information, however, including sector, carrier frequency and bus assignments for each hardware component, are labor-intensive and require considerable manual effort. Specifically, an operator typically manually enters the relationship between the physical address of each hardware component and the corresponding logical connection (sector and carrier frequency) for all hardware components installed on a given cell station. In addition, each slot often has a prewired address. When a hardware component is plugged into the slot, the hardware component reads the address value from the backplane and uses the address to communicate with other hardware components and the hardware controller on the common bus. Since the prewired backplane address has little or no physical location information, manually generated conversion information is needed to convert the backplane address to an understanding of the type of hardware component that is at that address, as well as the sector and carrier frequency associated with the hardware component.
As apparent from the above-described deficiencies with conventional techniques for obtaining system configuration information, a need exists for a technique for automatically determining system configuration information and for assigning addresses on a common bus.
SUMMARY OF THE INVENTION
Generally, according to one aspect of the invention, a method and apparatus are disclosed for dynamically determining an address that uniquely identifies a hardware component on a common bus. In an illustrative cell station implementation, each cell station includes a hardware controller that communicates on a common bus with a plurality of hardware components.
According to an aspect of the invention, each hardware component dynamically obtains a bus address that uniquely identifies the hardware component on the common bus. The address space is logically divided into two ranges, namely, a first range of addresses referred to as the common access addresses, and a second range of addresses referred to as the assigned addresses. One address is reserved for the primary node that is responsible for assigning addresses, such as the hardware controller. Thus, each hardware component communicates with the hardware controller on one of the common access addresses to request a channel, and thereafter communicates on an assigned address, once assigned by the hardware controller.
Collisions between multiple hardware components on the common access channels are minimized by allocating one address in the common access address space for each device type. Thus, hardware components of a different type can execute the access procedure in parallel since they access on a different common access channel. In an alternate implementation, collisions are minimized by allocating a plurality of common access addresses and having each hardware component randomly select a common access address. Assigning multiple channels for common access reduces the bus initialization time, since hardware components are less likely to have to wait for the appropriate access channel.
A hardware component may access the bus to obtain an assigned address by first listening to hear if any other hardware component is transmitting using the same common access channel. If the common access channel is clear, the hardware component sends an identification message to the hardware controller using the address reserved for the hardware controller. The common access address is associated with the identification message so the hardware controller may respond to the hardware component with an address assignment message on the hardware component's common access address. The address assignment message carries a new address assignment chosen by the hardware controller from the assigned address space. All further communication by the accessing hardware component takes place using the assigned address. Thereafter, the common access address is available for another hardware component to use.
REFERENCES:
patent: 4413318 (1983-11-01), Herrington
patent: 4638313 (1987-01-01), Sherwood, Jr. et al.
patent: 4773005 (1988-09-01), Sullivan
patent: 4847834 (1989-07-01), Bryant
patent: 5317693 (1994-05-01), Cuenod et al.
patent: 5680113 (1997-10-01), Allen et al.
patent: 5708831 (1998-01-01), Schon
patent: 5745699 (1998-04-01), Lynn et al.
patent: 5835725 (1998-11-01), Chiang et al.
patent: 5877745 (1999-03-01), Beeteson et al.
patent: 5898845 (1999-04-01), Frantz et al.
patent: 6009479 (1999-12-01), Jeffries
patent: 6094053 (2000-07-01), Harvey
patent: 6157527 (2000-12-01), Spencer et al.
patent: 6185638 (2001-02-01), Beardsley et al.
patent: 6195712 (2001-02-01), Pawlowski et al.
patent: 0 486 818 (1992-05-01), None
L.A. Baxter et al., “System 75: Communications and Control Architecture,” AT&T Technical Journal, vol. 64, No. 1, 153-173 (Jan. 1985).
Schafranek Alex
Strege Keith Elden
Elamin Abdelmoniem
Lucent Technologies - Inc.
LandOfFree
Method and apparatus for dynamically determining an address... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for dynamically determining an address..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for dynamically determining an address... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3054708