Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt queuing
Reexamination Certificate
2006-04-11
2006-04-11
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Interrupt processing
Interrupt queuing
C707S793000
Reexamination Certificate
active
07028124
ABSTRACT:
A method and apparatus for generating, initializing, and scheduling of two interrupt queue heads to represent a single endpoint are described. In an embodiment, a method includes generating primary and secondary interrupt queue heads to represent a single interrupt endpoint. The method further includes initializing the primary and secondary interrupt queue heads. The method also includes scheduling the primary and secondary queue heads in immediately subsequent frames.
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Hosler Brad W.
Howard John S.
Leete Brian A.
Blakely , Sokoloff, Taylor & Zafman LLP
Knoll Clifford
Perveen Rehana
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