Method and apparatus for DMA-generated memory write-back

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S161000, C711S166000

Reexamination Certificate

active

07380069

ABSTRACT:
A method for memory write-back provides a memory access controller and then generates a write-back pattern in the memory access controller. The write-back pattern is then written back into a memory starting at a predetermined address location and continuing for a predetermined length of the addressing space of the memory.

REFERENCES:
patent: 5031097 (1991-07-01), Kitakami et al.
patent: 5261072 (1993-11-01), Siegel
patent: 5623622 (1997-04-01), Yuki et al.
patent: 5809333 (1998-09-01), Story et al.
patent: 6073223 (2000-06-01), McAllister et al.
patent: 6115767 (2000-09-01), Hashimoto et al.
patent: 6279063 (2001-08-01), Kawasaki et al.
patent: 6611852 (2003-08-01), Morley et al.
patent: 6795078 (2004-09-01), Lavelle et al.
patent: 7124269 (2006-10-01), Chuang et al.

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