Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2001-05-08
2003-12-02
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S124000, C438S126000
Reexamination Certificate
active
06656769
ABSTRACT:
TECHNICAL FIELD
This invention relates to methods and apparatuses for distributing mold materials in a mold for packaging microelectronic devices.
BACKGROUND OF THE INVENTION
Packaged microelectronic assemblies, such as memory chips and microprocessor chips, typically include a microelectronic substrate die encased in a protective plastic covering. The die includes functional devices, such as memory cells, processor circuits, and/or interconnecting circuitry. The die also typically includes bond pads electrically coupled to the functional devices. The bond pads are coupled to pins, solder ball pads, or other types of terminals that extend outside the protective covering for connecting to buses, circuits and/or microelectronic assemblies.
In one conventional arrangement, illustrated in
FIGS. 1A and 1B
, several dies
40
are positioned on an upper surface of a substrate
30
, such as printed circuit board (PCB). Each die
40
includes conductive leads
41
that are electrically coupled through the substrate
30
to solder ball pads on the opposite surface of the substrate
30
. A mold
60
(shown in a side cross-sectional view in
FIG. 1B
) is positioned over the substrate
30
with a cavity
67
aligned with the dies
40
. The mold
60
is lowered onto the substrate
30
until an engaging surface
69
contacts the upper surface of the substrate
30
and the dies
40
fit within the cavity
67
. The cavity
67
is in fluid communication with a plurality of entrance ports
63
. Each entrance port
63
has an elongated, narrow gate region
62
aligned with a corresponding gold-plated gate pad
31
on the substrate
30
when the mold
60
is placed against the upper surface of the substrate
30
.
In operation, the entrance ports
63
are coupled to a source (not shown) of softened or liquid mold compound
50
. The mold compound
50
is injected through the entrance ports
63
to encapsulate the dies
40
, forming a package
20
with gate portions
51
extending outwardly over the gate pads
31
. The mold compound
50
is allowed to harden and the package
20
is ejected from the mold
60
by driving ejection pins (not shown) against the package
20
at ejection pin locations
52
. The package
20
is then broken off from the gate portions
51
along a break line
59
and is singulated to separate each packaged die
40
(and the portion of the substrate
30
to which each die
40
is attached) from the neighboring packaged dies
40
. The dies
50
are preferably positioned close together and close to the edges of the package
20
to reduce the size of the package
20
and the amount of residual or waste mold compound
50
remaining after the packaged dies
40
have been singulated.
SUMMARY OF THE INVENTION
The present invention is directed toward methods and apparatuses for distributing a mold material in a mold for packaging microelectronic devices. A method in accordance with one aspect of the invention includes at least partially enclosing in a mold a microelectronic device attached to a substrate, with the microelectronic device in a device region of the mold. The method further includes passing a mold material along a flow axis through at least one entrance port into and through an intermediate region of the mold. The method still further includes encapsulating the microelectronic device by passing the mold material from the intermediate region into the device region through a single opening spaced apart from and positioned between the entrance port and the microelectronic device. The single opening has a flow area transverse to the flow axis smaller than a flow area immediately upstream of the single opening in the intermediate region of the mold.
In a further aspect of the invention, the method can include hardening the mold material, separating a first portion of the mold material adjacent to the at least one entrance port from a second portion of the mold material adjacent the intermediate region of the mold to form cracks in the second portion of the mold material, with none of the cracks intersecting the microelectronic device. The cracks define a cracked portion of the mold material and the method can further include separating the cracked portion of the mold material from the microelectronic device.
The invention is also directed toward a microelectronic device package. In one aspect of the invention, the package includes a substrate, at least one microelectronic device attached to the substrate, and a hardened mold material at least partially enclosing the microelectronic device. The mold material has a device portion immediately adjacent to the microelectronic device, a gate portion spaced apart from the device portion, and the intermediate portion between the gate portion and the device portion. The mold material further includes an indentation at an intersection of the device portion and the intermediate portion. A first cross-sectional area of the mold material at the intersection is less than a second cross-sectional area immediately adjacent to the intersection in the device portion, and also less than a third cross-sectional area immediately adjacent to the intersection in the intermediate portion.
The invention is also directed toward a mold for packaging a plurality of microelectronic devices. In one aspect of the invention, the mold includes a mold body having an external surface, an internal surface defining a mold cavity, and an engaging surface configured to engage the substrate. The mold cavity includes a device region configured to extend at least partially around the microelectronic devices, at least one entrance port in fluid communication with the device region, an intermediate region between the entrance port and the device region, and a flow restrictor between the intermediate region and the device region. The cross-sectional areas of the mold cavity immediately upstream and downstream of the flow restrictor are larger than a cross-sectional area of the mold cavity at the flow restrictor.
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patent:
Choong Lien Wah
Lee Kian Chai
M Vijendran
Tim Teoh Bee Yong
Brewster William M.
Chaudhuri Olik
Micro)n Technology, Inc.
Perkins Coie LLP
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