Computer graphics processing and selective visual display system – Computer graphics display memory system – Plural storage devices
Reexamination Certificate
1999-06-01
2002-07-09
Chang, Kent (Department: 2673)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Plural storage devices
C345S545000
Reexamination Certificate
active
06417859
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is directed to an image formatting circuit, operating on video data encoded according to a plurality of framing rates and more particularly, to a method of flexibly controlling the buffering of video data in said circuit.
Previous buffer manager systems were hardwired to implement certain predetermined conversions, for example, 3-2 pulldown systems. The present buffer manager does not use a predefined sequence of replication or skipping of frames, as in conventional 3-2 pulldown systems, and thus any ratio of encoded frame rate and display frame rate can be accommodated. The present buffer manager is thus more flexible with respect to its strategy for dropping or duplicating frames in order to account for differences in the encoded data frame rate and the display frame rate.
SUMMARY OF THE INVENTION
The invention provides a method for buffering encoded video data organized as frames comprising determining the picture number of a frame, determining the desired presentation number of a frame and marking the buffer as ready when the picture number is on or after the desired presentation number.
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Finch Helen Rosemary
Sotheran Martin W.
Chang Kent
Discovision Associates
Masaki Keiji
Stokey Richard
Wong Steve
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