Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-03-08
2005-03-08
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S100000, C711S154000, C711S163000
Reexamination Certificate
active
06865642
ABSTRACT:
A disk caching method for an intermediary controller is disclosed. Requests for data blocks are made and then disk caching is performed according to a most expedient cache method. The disk caching method may be performed by asynchronously requesting a data record from both a intermediary controller disk storage and from a intermediary controller cache and using a first received copy of the data record, the first received copy being a copy received first from the intermediary controller disk storage. Alternatively, the disk caching may be performed by searching an intermediary controller cache to determine whether requested data is located in the cache of the intermediary controller, searching a storage device of the intermediary controller to determine whether requested data is located in the storage device of the intermediary controller and retrieving the requested data from a disk controller coupled to the intermediary controller when the requested data is not in the cache or storage device of the intermediary controller. The intermediary controller maintains a cache hit ratio for cache in a disk controller cache and chooses a cache method based upon a comparison of the hit ratio to the threshold. The intermediary controller selects an item to replace in the intermediary controller cache, moves data into the intermediary controller cache, determines whether the hit ratio of the disk controller is greater than the threshold and moves the item into the intermediary controller storage device when the hit ratio of the disk controller cache is greater than the threshold. The intermediary controller discards the item form the cache of the intermediary controller when the hit ratio of the disk controller is not greater than the threshold.
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Day III Kenneth Fairclough
Dewey Douglas William
Hanami Norman Iwao
Hanson Dean Lee
Pease David Allan
Crawford & Maunu PLLC
Thai Tuan V.
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