Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-09-06
2005-09-06
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S111000, C711S167000, C710S052000, C710S056000
Reexamination Certificate
active
06941419
ABSTRACT:
Aspects of the invention include a method and apparatus to manage the cache memory of a disc drive. In one aspect the data rates of different file read and write threads are used to determine the minimum seek time to allow the cache to be used more efficiently. In another aspect, the read/write cache segments are adjusted by determining the summation of the ratio between read/write cache segment sizes and the respective data rates and then adjusting the segment sizes to minimize the seek times for the data streams.
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Williams, et al., U.S. Appl. No. 09/696,861, filed Oct. 26, 2000 entitledVector Buffer Management.
Haines Jonathan W.
Herz William S.
Nguyen T
Seagate Technology LLC
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