Method and apparatus for direct virtual memory address caching

Details Method and apparatus for direct virtual memory address caching Method and apparatus for direct virtual memory address caching

2007-07-24

2007-07-24

Bragdon, Reginald (Department: 2189)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S006000, C711S203000, C711S205000, C711S206000, C710S022000

Reexamination Certificate

active

10834410

ABSTRACT:
A system including a direct virtual memory access engine configured to request that data is stored in a memory, wherein a request for the data includes a I/O virtual address, a mapping table configured to store at least one entry includes a virtual-to-physical address mapping, a cache configured to store at least one tracking data structure associated with the at least one entry, and an input/output memory management unit storing the mapping table, operatively connected to the cache and configured to provide a physical address corresponding to the I/O virtual address to the direct virtual memory access engine, wherein the virtual-to-physical address mapping is generated prior to the direct virtual memory access engine requesting that data be stored, wherein the at least one entry and the at least one tracking structure persist for at least two direct memory address requests.

REFERENCES:
patent: 6804729 (2004-10-01), Swanberg
patent: 7069389 (2006-06-01), Cohen
patent: 2004/0064669 (2004-04-01), Browning et al.
patent: 2004/0123068 (2004-06-01), Hashimoto

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