Method and apparatus for digital I/O expander chip with...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing

Reexamination Certificate

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C713S600000, C377S044000, C377S107000

Reexamination Certificate

active

07941687

ABSTRACT:
A method and apparatus for digital I/O expander chip with multi-function timer cells have been disclosed. A series of match reload registers load a series of match registers which are driven by a master counter. The status of the match registers can be retrieved through ports. The master counter is reloaded on rollover by a count limit register. The master counter has increment/decrement control and the rollover can be used in an interrupt control block to generate an interrupt request.

REFERENCES:
patent: 5535379 (1996-07-01), Koura
patent: RE36063 (1999-01-01), Conner
patent: 6222900 (2001-04-01), Hara
patent: 7475269 (2009-01-01), Padwekar et al.

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