Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-22
2006-08-22
Thompson, A. M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07096448
ABSTRACT:
Some embodiments provide a method of routing nets within a region of an integrated-circuit (“IC”) layout. The method uses a first set of lines to partition the IC region into a plurality of sub-regions. In addition, the method uses a second set of lines to measure congestion of routes for the nets within the IC region. According to this method, at least some of the lines in the second set are different from the lines in the first set.
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Buset Oscar
Chao Heng-Yi
Teig Steven
Cadence Design Systems Inc.
Stattler Johansen & Adeli LLP
Thompson A. M.
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