Electronic digital logic circuitry – Reliability – Fail-safe
Reexamination Certificate
2005-11-01
2005-11-01
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Reliability
Fail-safe
C326S026000, C716S030000, C713S320000
Reexamination Certificate
active
06960930
ABSTRACT:
In order when designing a digital circuit to be able to determine the minimum or maximum switching activity for estimating the power consumption it is determined according to the invention on the basis of a model of the digital circuit whether there is a disproving operational case, in which the switching activity is less than an estimated value (k) for the minimum switching activity or greater than an estimated value (k) for the maximum switching activity. If the existence of an appropriate disproving operational case (P(k)) can be found, when determining the maximum switching activity the estimated value (k) is increased by one step size and when determining the minimum switching activity the estimated value (k) reduces. After a decrease or increase of the estimated value (k) the process is repeated and in this way the actual value for the maximum or minimum switching activity of the digital circuit is determined iteratively. After an appropriate interruption condition the currently used estimated value (k) is employed as the measure for the minimum or maximum switching activity. Based on the minimum or maximum switching activity on the one hand the minimum or maximum power consumption of the digital circuit can be determined or on the other hand further diagnostic functions can be carried out.
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Satyanarayana J.J. et al, “Systematic Analysis of Bounds on Power Consumption in Pipelined and Non-Pipelined Multipliers”, IEEE Computer Society Press, Oct. 7, 1996, pp. 492-499.
Bobba S., et al. “Estimation of Maximum Switching Activity in Digital VLSI Circuits”IEEE Aug. 3, 1997, pp. 1130-1133.
Bhanja S., et al. “Switching Activity Estimation of Large Circuits Using Multiple Bayesian Networks”, Proceedings of the 15thInternational Conference on VLSI Design. IEEE Computer Society pp. 187-192.
Cho James H.
Corless Peter F.
Edwards & Angell LLP
Infineon - Technologies AG
Jensen Steven M.
LandOfFree
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