Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-01-29
2008-01-29
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07325219
ABSTRACT:
Techniques for automating probing location selection during printed circuit board (PCB) and corresponding PCB tester fixture design are presented. The invention includes a system and algorithm for selecting a probe layout comprising a set of probing locations for a printed circuit board design having a plurality of nets, at least some of which have a number of alternative possible probing locations. The system and algorithm iteratively generates a potential probe layout comprising one or more probing locations per net, and based on the potential probe layout, determines one or more regions of maximum deflection. A probing location from the potential probe layout that is located in a region of maximum deflection and is associated with a net having one or more alternative probing locations is removed from the potential probe layout and replaced in the with one of the one or more alternate probing locations associated with the net. Regions of maximum deflection are recalculated based on the modified potential probe layout, and the replacement process is repeated until respective magnitudes of the respective areas of maximum deflection are below a threshold value.
REFERENCES:
patent: 6839883 (2005-01-01), Ahrikencheikh
patent: 6839885 (2005-01-01), Ahrikencheikh
patent: 7103856 (2006-09-01), Ahrikencheikh
patent: 2004/0031000 (2004-02-01), Ahrikencheikh
patent: 2006/0129955 (2006-06-01), Jacobsen et al.
Jacobsen Chris R.
Parker Kenneth P.
Agilent Technologie,s Inc.
Whitmore Stacy
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