Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-01-26
2002-03-12
Beausoleil, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S043000
Reexamination Certificate
active
06357018
ABSTRACT:
BACKGROUND
The disclosures herein relate generally to computer systems, and more particularly, to determining continuity and integrity of a RAMBUS channel of a computer system workstation.
Currently available SDRAM (synchronous dynamic random access memory) DIMM (dual in-line memory module) subsystems use a parallel topology, such as shown in FIG.
1
. The subsystem
10
includes a controller
12
, sockets
14
, and modules
16
connected in parallel via data, address, control, and clock lines, collectively indicated by reference numeral
18
. No specific order is required to populate the sockets of the SDRAM DIMM subsystem. The pin count for each DIMM may include
72
or
168
, for example. Any contamination on the contact pins and/or sockets of any one module renders an affected module unusable and/or unreliable. However, the subsystem may still be operable with the use of the remaining modules. Failure of the subsystem may not be completely catastrophic. Diagnosis of which module is faulty and replacement of the faulty module (or cleaning of the module's contacts) is fairly easy to accomplish.
In contrast to SDRAM DIMM subsystems, a RAMBUS memory channel subsystem uses a series topology that is routed through several connectors and modules. Each module may contain at least one, and up to sixteen memory devices per module. Currently available RAMBUS subsystems contain three RAMBUS in-line memory modules (RIMMs). If any module or signal connector of the subsystem is not connected properly, then the RAMBUS subsystem will fail (i.e., not operate). In addition, if an improper connection occurs in either a clock line, a control line, or a data line, then the RAMBUS channel will also fail. Furthermore, in the event of the occurrence of an improper connection, the RAMBUS channel loses its integrity. A computer system having a faulty RAMBUS channel will not be able to boot-up or recognize any memory.
Memory module contact/seating issues are a leading cause of memory channel subsystem factory failures. There is no known way to test the memory module contact/seating of a RAMBUS subsystem other than with the use of standard memory tests. Standard memory module contact/seating testing currently includes visual inspection and memory pattern/functionality testing. Such standard testing methods have proved to be non-efficient for use in a high volume computer manufacturing environment.
It would be desirable to provide an improved method and apparatus for determining a continuity and integrity of a RAMBUS channel in a computer system.
SUMMARY
According to one embodiment, a computer system includes at least one processor, at least one memory, and a device for performing a prescribed continuity and integrity check of a memory bus channel having a serial topology. In addition, basic input output system (BIOS) firmware is stored in memory and includes instructions for causing the processor to perform the prescribed continuity and integrity check of the memory bus channel having a serial topology.
The embodiments of the present disclosure provide a technical advantage of an improved method and apparatus for determining a continuity and integrity of a RAMBUS channel in a computer system.
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“Rambus Memory: Multi-Gigabytes/Second And Minimum System Cost” 4 pages.
“Memory Latency Comparison” Rambus Inc., Sep. 6, 1996, 8 pages.
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Nelson Amy C.
Stuewe John
Beausoleil Robert
Bonzo Bryce P.
Dell USA L.P.
Haynes and Boone LLP
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