Method and apparatus for detecting devices that can latchup

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

06848089

ABSTRACT:
A method and apparratus for for identifying circuits within an integrated circuit design that are likely to latchup. The present invention accomplishes the identification by searching for suspect circuits and then modifying these circuits to represent a device known by an EDA tool (e.g. FET device). The EDA tool can then be used to determine the likelihood of latchup occuring based upon the modified device.

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