Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1997-09-30
2000-07-25
Gossage, Glenn
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711220, G06F 1200
Patent
active
060947136
ABSTRACT:
A method and apparatus for detecting address range overlaps. According to one embodiment, a first mask is generated for a first address range and a second mask is generated for a second address range. A first AND operation is performed on the first address range and the second mask to output a first temporary value. A second AND operation is performed on the second address range and the first mask to output a second temporary value. The first temporary value is then compared to the second temporary value to detect an overlap between the first address range and the second address range. According to an alternate embodiment, a first mask is generated for a first address range and a second mask is generated for a second address range. The first mask is then compared to the second mask to detect an overlap between the first address range and the second address range.
REFERENCES:
patent: 5241633 (1993-08-01), Nishi
patent: 5287498 (1994-02-01), Perelman et al.
patent: 5548795 (1996-08-01), Au
patent: 5848256 (1998-12-01), Call et al.
Call Josef R.
Khadder Ghassan
Morrison Michael J.
Gossage Glenn
Intel Corporation
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